1. Field of the Invention
The present invention relates to a DC-DC converter that converts a DC power supply voltage to produce another DC voltage insulated from the DC power supply voltage and particularly to a controller of a synchronous rectifier circuit that rectifies a voltage of a secondary winding of a transformer in the DC-DC converter.
2. Background Art
In FIGS. 6A to 6C, examples of related forward type DC-DC converter circuits are shown each of which uses a synchronous rectifier circuit using related art. FIG. 6A is a circuit diagram showing a one-transistor type DC-DC converter circuit including a main (hereinafter referred to as “primary”) winding n1 and a magnetic resetting (hereinafter referred to as “tertiary”) winding n3 on the primary circuit side of a transformer Tr and a synchronous rectifier circuit on the secondary winding n2 side. The circuit is that described in Japanese Patent No. 4,094,727.
In the DC-DC converter circuit, a series circuit of the primary winding n1 of the transformer Tr and a semiconductor switch (here, a MOSFET) Q1, to which a diode D1 is connected in inverse parallel, is connected in parallel to a DC power supply DP. Moreover, between the other end of the tertiary winding n3, connected in series to the primary winding n1, and the negative electrode of the DC power supply DP, a diode D2 is connected. The secondary winding n2 of the transformer Tr is connected in parallel to a series circuit in which the source terminal of a synchronous rectification MOSFET Q2, to which a diode D3 is connected in inverse parallel, and the source terminal of a freewheeling MOSFET Q3, to which a diode D4 is connected in inverse parallel, are connected. In addition, across the MOSFET Q3, a smoothing filter is connected in parallel which is formed of a series circuit of a reactor L and a capacitor C. Furthermore, across the capacitor C, a DC load LD is connected in parallel. The gate terminal of the synchronous rectification MOSFET Q2 is connected to the one end of the secondary winding n2 and the gate terminal of the freewheeling MOSFET Q3 is connected to the other end of the secondary winding n2.
In such a configuration, the turning-on of the MOSFET Q1 induces a voltage across the secondary winding n2 of the transformer Tr to allow a current to flow along a path of the reactor L→the parallel circuit of the capacitor C and the load LD→the diode D3 to supply DC electric power to the load LD, by which DC electric power is supplied to the load LD. By giving a turning-on signal to the MOSFET Q2 in this mode, the current in the diode D3 is commutated to the MOSFET Q2.
Subsequent to this, the turning-off of the MOSFET Q1 allows the excitation energy of the transformer Tr to be absorbed in the DC power supply DP through the diode D2 and the resetting winding n3. Moreover, in the circuit on the secondary winding n2 side, by turning-off the rectifying MOSFET Q2 and simultaneously turning-on the freewheeling MOSFET Q3, the current in the reactor L is brought into a freewheeling condition along a path of the parallel circuit of the capacitor C and the load LD→the parallel circuit of the diode D4 and the MOSFET Q3→the reactor L and is made reduced. This, compared with the case without the use of the MOSFETs Q2 and Q3, reduces a forward voltage drop, by which a conduction loss can be therefore made reduced.
In the driving system, the rising of the gate driving signal for each of the MOSFETs Q2 and Q3 becomes slower compared with the rising of the current in each of the rectifying diode D3 and the freewheeling diode D4. This lengthens the time in which a current flows in each of the diodes to cause small effect of loss reduction. For solving the disadvantage, in the circuit described in Japanese Patent No. 4,094,727, a PLL (Phase-locked-loop) circuit is used to generate a signal with the phase thereof leading to the phase of the voltage across the secondary winding n2 of the transformer Tr for being served as the driving signal of the MOSFET.
FIG. 6B is a circuit diagram showing the circuit described in JP-A-11-206118 as an example of related art. The circuit has a configuration in which from a control circuit of a gate driving signal for the primary side MOSFET Q1, an additional signal is transmitted to the secondary winding n2 side of a transformer Tr through a signal insulating transformer Trx and a gate driving circuit GD1 to be applied as a driving signal to the gate of a MOSFET Q3 connected in inverse parallel to a freewheeling diode D4. The driving signal, compared with the rising of the voltage across the secondary winding n2 of the transformer Tr, has a rising in a leading phase. Thus, compared with the example of the related circuit shown in FIG. 6A, the time in which a current flows in the diode D4 can be reduced to reduce a conduction loss.
FIG. 6C is a circuit diagram showing the circuit described in Japanese Patent No. 3,991,785 as an example of related art. On the secondary winding n2 side of the transformer Tr, in parallel to the MOSFET Q2, a gate driving circuit GD3 is connected which detects the direction of a current to drive the MOSFET Q2 and, in parallel to the MOSFET Q3, a gate driving circuit GD2 is connected which is identical to the gate driving circuit GD3. The gate driving circuits GD2 and GD3 have the circuit configurations identical to each other. The gate driving circuits GD2 and GD3 detect that the cathode potentials of the diode D4 and D3 lower compared with the anode potentials thereof when currents begin to flow in the forward directions of the diodes D4 and D3 so as to immediately apply driving signals to the gates of the MOSFETs Q3 and Q2, respectively. The circuit has the advantage of requiring no insulating transformer to simplify the circuit configuration compared with the circuit shown in FIG. 6B.    Patent Document 1: Japanese Patent No. 4,094,727    Patent Document 2: JP-A-11-206118    Patent Document 3: Japanese Patent No. 3,991,785
As was explained in the foregoing, the synchronous rectifier circuits have various kinds of configurations in their driving systems. For improving the conversion efficiency of a synchronous rectifier circuit, it is important to shorten the time to the utmost in which a current flows in the forward direction of a diode and to interrupt a reverse current at the switching of a diode and a feedthrough current of a MOSFET. Thus, it is necessary to optimize the timing of making the MOSFETs in the synchronous rectifier circuit turned-on and -off.
In the example of the related synchronous rectifier circuit shown in Patent Document 1, the use of the PLL circuit providing phase lead of the voltage across the winding of the transformer enables synchronous rectification with high conversion efficiency. However, the PLL circuit causes a delay of more than one period in the response thereof, which makes it impossible for the PLL circuit to respond to an abrupt variation in an input voltage or in a load to result in an increase in a loss.
In the example of the related synchronous rectifier circuit shown in FIG. 6B, a transformer is required for insulating a signal in the primary side circuit from the secondary side circuit, which increases the number of parts and the area of surface mounting. In the example of the related synchronous rectifier circuit shown in FIG. 6C, when change in current with respect to time di/dt (“i” represents a current and “t” represents time) is large, delay in detection is caused which produces a flow of a reverse current or a feedthrough current to lower the conversion efficiency of the circuit.
Accordingly, it is an object of the invention to provide a forward DC-DC converter to which a driving circuit is applied that can reduce a loss in a secondary synchronous rectifier circuit without receiving any signal from a primary circuit.